Senior Analog Design Engineer at Synopsys, Québec

Join Synopsys as a Senior Analog Design Engineer, focusing on high-speed SERDES IP development. Leverage your expertise in circuit design and collaboration to innovate connectivity solutions.

In this key role, you will address complex circuit challenges, lead crucial projects, and work with diverse teams to achieve optimal results. With your extensive background in CMOS design and effective communication skills, you will provide both technical leadership and foster innovation across projects.

Key Responsibilities:• Develop SERDES transceiver architectures per industry standards • Design and verify high-speed analog circuits for efficiency • Collaborate with teams to enhance design quality • Present technical findings to stakeholders internally and externally • Oversee layouts to reduce parasitics and increase reliability

Requirements:• Ph.D. with 6+ years or M.Sc. with 8+ years in analog IC design • Expertise in CMOS and SERDES circuit design • Proficient in schematic and SPICE tools • Familiarity with Verilog-A and Python scripting • Strong communication and documentation capabilities

Enhance Synopsys' SERDES IP with your analog design expertise and innovation. #J-18808-Ljbffr