Design Verification Engineer at Lightmatter, Toronto

Elevate your engineering career as a Design Verification Engineer at Lightmatter. Collaborate with top-tier digital design experts using UVM testbench techniques to ensure cutting-edge photonic designs are verified.

At Lightmatter, you will engage with both digital and analog designers to create comprehensive test plans. Your role is critical in maintaining the integrity of revolutionary designs with a focus on Real Number Modeling and AMS verification. This position also allows for skill expansion in areas like performance modeling and formal verification while contributing to groundbreaking technology.

Key Responsibilities:• Collaborate with designers to formulate comprehensive verification test plans • Create and debug UVM test benches for effective design verification • Develop Real Number Models for accurate analog representation • Participate in creating Golden Reference Models for DV• Run emulations and formal verification tasks

Requirements:• Master’s degree in Electrical or Computer Engineering • 1‑5 years of design verification experience • Proficiency in SystemVerilog and UVM methodologies • Experience with simulation tools like ModelSim or Questa • Scripting proficiency in Perl or Python

Join Lightmatter to redefine computing with light and strengthen your Design Verification skills! #J-18808-Ljbffr