Digital Senior SerDes Design Engineer (Ahuntsic-Cartierville)

Company Overview

As the global leader in high-speed connectivity, Ciena is committed to a people-first approach and a culture focused on a flexible work environment that empowers individual growth, well-being, and belonging. Role Overview

The Senior Digital Design Engineer will design power and area optimized functional blocks for the Wavelogic family of products used in Ciena’s optical fiber transmission solutions. The role requires collaboration with digital design engineers, verification engineers, architects, and systems engineers. Responsibilities

Read and understand architecture and functional requirement specifications Produce implementation specification documents and receive peer review from team, architects, and analog designers Develop, integrate, and test new and existing RTL and/or C source code, algorithms, and functions Conduct designer testing, debugging during simulation and regression verification Assist verification team in coverage determination, providing design assertions and waivers as needed Craft timing constraints; participate in synthesis log reviews, constraint reviews, timing report analysis, and layout/ backend reviews Participate in lab validation of the product prototypes where applicable Report on status updates on a regular basis Qualifications

BEng/BSc or MEng/MSc in Electrical, Computer, or other applicable engineering/science degree Intermediate or higher proficiency in SystemVerilog for design Strong self‑starter, able to work independently while being a team player Methodical problem‑solving skills for complex technical issues Excellent organization and written and oral communication skills (English) Familiarity with digital (including formal) verification methods Experience with digital design synthesis, static timing analysis, timing closure, and asynchronous clock crossing Good understanding of timing/power/area analysis and trade‑offs Preferred Assets

Digital silicon design backend experience Experience in low‑power digital design Digital signal processing design experience Knowledge of industry standards such as IEEE, Ethernet, or OIF standards for optical communication Experience with GIT for source code management and revision tracking Experience with Jira for schedule planning, assignment tracking, and bug reporting Familiarity with programming languages such as Python, Make, Bash, C, C++, SystemC, and object‑oriented programming Salary & Benefits

Annual pay range: $109,000 – $174,000 CAD (Ottawa). Competitive salary adjustable for knowledge, skills, market conditions, and location Discretionary incentive bonus for non‑sales employees; sales commission for sales employees Medical, dental, and vision plans 401(K) (USA) and DCPP (Canada) with company matching Employee Stock Purchase Program (ESPP) Employee Assistance Program (EAP) Company‑paid holidays, paid sick leave, and vacation time Compliance with Paid Family Leave and other applicable leaves of absence Equal Opportunity Employer

Ciena is an Equal Opportunity Employer, including disability and protected veteran status. If contacted in relation to a job chance, please advise Ciena of any accommodation measures you may require.

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