Design Verification Engineer Senior Can Saskatchewan

THE ROLE We are looking for an adaptive, self-motivated design verification engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve Client's abilities to deliver the highest quality, industry-leading technologies to market. The Verification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. THE PERSON You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES Develop/Maintain tests for functional verification with UVM verification at the subsystem level Build testbench components to support the next generation IP Maintain or improve current test libraries to support IP level testing Technically lead IPs in Control Fabric Have exposure to AXI protocol and Bootcode Verification Provide technical support to other teams PREFERRED EXPERIENCE + years' experience required Positive at C/C++ Valuable at SV and UVM Good scripting knowledge in Perl, Ruby and Makefile Familiarity with System Verilog and up-to-date verification libraries like UVM ACADEMIC CREDENTIALS Bachelors (required) or Masters degree in computer engineering/Electrical Engineering EEO Statement US Tech Solutions is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, colour, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran. Apply on Kit Job: kitjob.ca/job/2p21mu